How The RIDL CPU Vulnerability Was Found

In this video we explore the basic ideas behind CPU vulnerabilities and have a closer look at RIDL.
This video is sponsored by Intel and their Project Circuit Breaker: https://www.projectcircuitbreaker.com/

How to Benchmark Code Execution Times: https://www.intel.com/content/dam/www...
Anders Fogh: https://cyber.wtf/2017/07/28/negative...
Speculose: https://arxiv.org/abs/1801.04084
RIDL Paper: https://mdsattacks.com/files/ridl.pdf
Foreshadow PoC: https://github.com/gregvish/l1tf-poc/...
Sebastian Österlund: https://osterlund.xyz/

Chapters:
00:00 - Intro & Motivation
00:57 - Concept #1: CPU Caches
01:57 - Measure Cache Access Time with rdtscp
05:00 - Concept #2: Out-of-order Execution
06:11 - CPU Pipelining
07:13 - Out-of-order Execution Example
09:19 - CPU Caching + Out-of-order Execution = Attack Idea!!
10:33 - Negative Result: Reading Kernel Memory From User Mode
13:45 - Pandoras Box
14:23 - Interview with Sebastian Österlund
17:24 - Accidental RIDL Discovery
19:31 - NULL Pointer Bug
21:50 - Investigating Root Cause
23:28 - Conclusion
24:24 - Outro

=[ ❤️ Support ]=

→ per Video: Patreon: liveoverflow
→ per Month: @liveoverflow

=[ 🐕 Social ]=

→ Twitter: Twitter: LiveOverflow
→ Instagram: Instagram: LiveOverflow
→ Blog: https://liveoverflow.com/
→ Subreddit: Reddit: LiveOverflow
→ Facebook: Facebook: LiveOverflow

• #education
• #live_overflow
• #liveoverflow
• #hacking_tutorial
• #how_to_hack
• #exploit_tutorial
• #out_of_order
• #transient_execution
• #ridl
• #spectr
• #meltdown
• #specter
• #cpu_vulnerabilities
• #cpu_vulns
• #intel_cpus
• #hacking_cpus
• #side_channel_attacks
• #sidechannel_leaks