Design and Implementation of Efficient Flash ADC
47 بار بازدید -
2 سال پیش
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https://www.ijert.org/design-and-impl...
IJERTV9IS050757
Design and Implementation of Efficient Flash ADC
M. Pavan Kumar , P. Venkatesh , K. Venkatesh , G. Chanakya, S. Ravi Teja
In wireless communication system signal converters like analog to digital and digital to analog plays very important role. It is very typical task to achieve low power, less area occupancy, error free converters. This paper presents the design of Analog to Digital converter with less operated voltage and less power consumption. basic modules to design ADC are comparators and encoders. For conventional n-bit ADC device requires 2n comparators along with encoder. We have designed different optimization comparators and decoders to make efficient ADC device and compare the basic parameters like transistor count, average power consumption, operating frequency and operating voltage.
We design Flash type ADC with less transistors, less power consumption comparator along with encoder by using Tanner EDA analog environment 180nm technology node with moderate resolution.
https://www.ijert.org/design-and-impl...
IJERTV9IS050757
Design and Implementation of Efficient Flash ADC
M. Pavan Kumar , P. Venkatesh , K. Venkatesh , G. Chanakya, S. Ravi Teja
In wireless communication system signal converters like analog to digital and digital to analog plays very important role. It is very typical task to achieve low power, less area occupancy, error free converters. This paper presents the design of Analog to Digital converter with less operated voltage and less power consumption. basic modules to design ADC are comparators and encoders. For conventional n-bit ADC device requires 2n comparators along with encoder. We have designed different optimization comparators and decoders to make efficient ADC device and compare the basic parameters like transistor count, average power consumption, operating frequency and operating voltage.
We design Flash type ADC with less transistors, less power consumption comparator along with encoder by using Tanner EDA analog environment 180nm technology node with moderate resolution.
2 سال پیش
در تاریخ 1401/02/07 منتشر شده
است.
47
بـار بازدید شده